EMC Troubleshooting Part 1 — Reading Radiated Emissions Like a Map

Goal: Use the radiated emissions (RE) plot to quickly identify the likely noise source and prove it with simple, low‑risk tests.

1) Start by slicing the spectrum

When you receive an RE plot from the test lab, don’t stare at the whole thing at once. Break it into three working bands:

• 30–150/200 MHz  → often dominated by cables acting as antennas (common‑mode currents), PSU/DCDC fundamentals + low‑order harmonics coupling onto leads.

• 150/200–300/400 MHz → transition region; cable resonances and board‑level loops both contribute. bypass capacitors, etc.

• > 400/500 MHz up to 1 GHz → mostly board‑level issues: fast edges, poor return paths, apertures, heatsinks, high‑speed I/O. most likely you need a Board redesign

This framing helps you ask: Is the energy primarily riding out on cables, or is it launched from the PCB itself?

2) Look for "a bell shape footprints" on the plot

Different noise mechanisms leave recognisable shapes. The one you’ll meet most often is from a DC‑DC converter:

• A broadband “bell” (hump) that gradually tapers with frequency. You may see smaller, repeating humps at higher bands as harmonics and cable resonances interact. As frequency increases, each hump is typically narrower and lower.

• The same footprint often appears in Conducted Emissions (CE) as a matching hump around the converter’s switching frequency and its harmonics.

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Rule of thumb: if the dominant emissions sit below ~150 MHz and the pattern looks bell‑shaped, common‑mode energy on cables driven by the DC‑DC is a prime suspect.

3) Prove (or disprove) your hypothesis with three quick tests

These are non‑destructive, fast checks you can do during pre‑compliance or at the lab.

A) Sweep the input voltage (e.g., 9 V → 15 V → 24 V)

If the DC‑DC is the engine behind the hump, changing its operating point changes the width/position of the bell because duty cycle, ripple current, and control‑mode behaviour shift with input voltage.

Expect: measurable change in hump width and/or position across the sweep. If nothing moves, you may be chasing the wrong source (or the converter uses a control scheme that keeps switching conditions almost constant).

Tip: Capture three overlaid traces labelled with VIN.

B) Nudge converter efficiency / switching stress

Alter conditions that change di/dt and dv/dt:

• Add/remove a snubber on the switching node.

• Slightly adjust switching frequency (if your controller allows it) or change load.

• Temporarily add small series resistance in the gate drive (slows edges) or in the input path (carefully, within thermal limits) to reduce peak currents.

Expect: when edges get sharper (often more efficient switching), the bell/harmonics may grow; when edges are tamed (snubbers, slower rise/fall), the bell tends to shrink. You’re not “fixing” yet—just proving causality.

C) Change cable length to confirm the radiator

If a cable is the primary antenna, changing its length should move its resonances and redistribute the hotspots on the RE plot.

Use the quarter‑wave heuristic:

fquarter≈c4 L VFf_{\text{quarter}} \approx \frac{c}{4\,L\,\text{VF}}

Where c is the speed of light, L the cable length, VF the velocity factor (~0.66 for PVC‑insulated cables; check your datasheet). Cable resonances also occur at odd multiples of quarter‑wave and at half‑waves, so expect multiple peaks.

Expect: a long cable (e.g., 10 m) is efficient at low frequencies (30–50 MHz). Shortening to ~1.5 m makes it inefficient around 30 MHz but relatively more efficient near a few hundred MHz.

Field note: a client failed around 30–40 MHz using a 10 m power lead. By reducing the lead to 1.5 m, the cable became inefficient at ~30 MHz, pushing energy up the band and turning a fail into a pass at the limit line—without touching the PCB.

4) If the DC‑DC is confirmed, try the fast mitigations

Start with the measures that target common‑mode current on the way out of the box:

• Common‑mode choke/filter (CMC) on the power lead between the DC‑DC and the external cable. Size it for your DC current and check saturation. I set the saturation curremt approx 2 time the max. current

• Add Bulk capacitor at the input

• Add small ceramic capacitor at the input

• Snubbers/damping on the switch node or diode to tame ringing (validate thermals).

• Spread‑spectrum on the controller (when available) to flatten peaks (confirm against limit detectors and measurement bandwidths).

These typically produce an immediate, visible reduction in the bell and its repeats.

Recap

1. Slice the spectrum → 30–150/200, 150/200–300/400, 400/500–1000 MHz.

2. Look for the DC‑DC bell footprint (broad, tapering humps; often mirrored in CE).

3. Prove it with VIN sweep, efficiency/stress tweaks, and cable‑length changes.

4. Fix the export path (CMC, return to chassis) and tame the source (loops, snubbers).

Coming next (Part 2)

Typical PoE‑related issues: phantom powering, CM chokes selection, magnetics balance, and how RE/CE footprints differ when the injector/switch is part of the system.

If you’d like, I’ll record a short demo showing how the “bell” width shifts with input voltage and why the maths predicts it—stay tuned.